/* gpio.h - definintions for the gpio device */

/*
 * Control and Status Register (CSR) definintions for the GPIO.
 * The code maps the structure structure directly onto the base address
 * CSR address for the device.
 */

/* Number of GPIO devices in the hardware */
#define NGPIO   4

struct gpio_csreg {
        volatile uint32 revision;
        volatile uint32 res1[3];
        volatile uint32 sysconfig;
        volatile uint32 res2[3];
        volatile uint32 eoi;
        volatile uint32 irqstatus0raw;
        volatile uint32 irqstatus1raw;
        volatile uint32 irqstatus0;
        volatile uint32 irqstatus1;
        volatile uint32 irqset0;
        volatile uint32 irqset1;
        volatile uint32 irqclear0;
        volatile uint32 irqclear1;
        volatile uint32 irqwaken0;
        volatile uint32 irqwaken1;
        volatile uint32 res3[50];
        volatile uint32 sysstatus;
        volatile uint32 res4[6];
        volatile uint32 control;
        volatile uint32 oe;
        volatile uint32 datain;
        volatile uint32 dataout;
        volatile uint32 level0;
        volatile uint32 level1;
        volatile uint32 rising;
        volatile uint32 falling;
        volatile uint32 deb_ena;
        volatile uint32 deb_time;
        volatile uint32 res5[14];
        volatile uint32 clear_data;
        volatile uint32 set_data;
};

typedef void (*gpiointhook)(uint32, uint32);

struct  gpiocblk        {       /* GPIO control block                   */
        gpiointhook gphookfn;   /* Interrupt hook function              */
};

extern  struct  gpiocblk        gpiotab[];

/* Pin Masks */
#define PIN_MASK(pin)    (1<