Zhiyuan Li - Department of Computer Science - Purdue University Skip to main content
Zhiyuan Li photo

Zhiyuan Li

Professor of Computer Science

Professor of Electrical and Computer Engineering (courtesy)


Joined department: 1997

Education

BS, Xiamen University, Mathematics (1982)
MS, University of Illinois at Urbana-Champaign, Computer Sciences (1985)
PhD, University of Illinois at Urbana-Champaign, Computer Sciences (1989)

Zhiyuan Li has conducted many years' research on compiler techniques for parallel processing and locality enhancement. Recent focus of his group in this area is on programming interfaces and compiler support for the development of innovative parallel software, targeting both large scale high-end systems and multicore microprocessor chips. In recent years, his group has also designed and implemented compiler-based programming environments and run-time systems for resource-constrained distributed systems such as mobile devices, embedded systems and wireless sensor networks, improving their energy efficiency, reliability and maintainability.

Li received a National Science Foundation Research Initiation Award and a National Science Foundation Career Award in 1992 and 1995, respectively. He was named by Purdue University as a University Faculty Scholar for the years of 2005-2010. Li has served as a program committee member for many international conferences sponsored by IEEE and ACM. He is Program Chair for ACM SIGPLAN/SIGBEG Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES) in 2007. He co-chaired the International Workshop on Languages and Compilers for Parallel Computing in the years of 1997 and 2004 respectively.

Selected Publications

Z. Li et al., "Dependence-based multilevel tracing and replay for wireless sensor networks debugging", in ACM SIGPLAN/SIGBED Conference on LCTES,, Chicago, IL, 2011.
Z. Li et al., "Reducing communication overhead in large eddy simulation of jet engine noise", in IEEE Cluster 2010,, Heraklion, Greece, 2010.

L. Liu and Z. Li, "A compiler-automated array compression scheme for optimizing memory intensive programs", in 24th ACM ICS,, Epochal Tsukuba, Japan, 2010.

Last Updated: Dec 4, 2020 1:55 PM

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